It is common to mount integrated-circuit chips for processing signals, such as chips including processing units for decoding video signals, on large boards including electrical connection networks and to mount integrated-circuit memory chips on these boards near said signal processing chips, these memory chips being connected to the signal processing chips by way of the electrical connection networks of the boards. In the case where, in particular due to the amount of memory necessary, a number of memory chips need to be connected to a signal processing chip, the quantity of electrical connections required between these chips means that the electrical connection network of the board must comprise a number of metallization levels, generally four, and include, to provide crossovers, via-comprising bridges between these levels. Such a layout makes it difficult to manufacture the board and increases the cost of the latter. In addition, the interconnects between the memory and the processing circuits are subjected to numerous routing constraints related to the high signal frequency, to the existence of differential pairs, to control of impedances and to connection length. Furthermore, the dissipation of the heat produced is a problem
There is a need in the art to alleviate the above drawbacks.